TEACHING

EE4408                   Silicon Device Reliability

EE4411/EE4411E   Silicon Processing Technology

RESEARCH

MAJOR RESEARCH INTERESTS

• Growth and characterization of thin films and nanostructures for applications in electronics, photovoltaics, electrochromics, etc.

•  Development of electrical and physical characterization techniques for understanding metal-oxide-semiconductor (MOS) device physics and reliability issues.

• Surface and interface studies of metal oxide materials on semiconductors and application of high dielectric constant (high-κ) materials in nanoelectronic memory devices, e.g., nanocrystal, SONOS and RRAM memories.

RESEARCH STUDENTS SUPERVISED

Successfully graduated 14 Ph.D. and 27 M.Eng. students. Currently supervising 4 Ph.D. students.

Graduated Ph.D. Students

·             Pi Can (Ph.D. student – Ph.D. awarded in 2012) – “Investigation of yttrium oxide and silver/silver sulfide for memory resistive switching application”

·                 Huang Jinquan (Ph.D. awarded in 2011) – “Growth and characterization of germanium and silicon nanostructures”

·                 Zheng Jianxin (SMA Ph.D. student – Ph.D. awarded in 2008) – “First-principles study on native point defects in high dielectric constant materials”

·                 Chew Han Guan (SMA Ph.D. student – Ph.D. awarded in 2008)  – “Synthesis of Ge nanocrystals in silicon oxide and HfAlO matrices: Effect of Ge concentration, ambient, stress and matrix”

·                 Chiam Sing Yang (A*Star-Imperial College Ph.D. student - Ph.D. awarded in 2008) – “Yttrium based thin films on Si (001): Study of film growth and interfacial properties”

·                 Tan Yan Ny (Ph.D. awarded in 2007) – ”High dielectric constant materials in SONOS-type non‑volatile memory structures”

·                 Wong Kin Mun (Ph.D. awarded in 2007) – “Dielectric characterization and dopant profile extraction using scanning capacitance microscopy”

·                 Ng Tsu Hau (Ph.D. awarded in 2006) – “Alternative gate dielectrics and application in nanocrystal memory”

·                 Koh Bih Hian (Ph.D. awarded in 2005) – “Modelling and characterization of high dielectric constant tunnel barriers for future non-volatile memory applications”

·                 Eric Kan Wing Hong (SMA Ph.D. student – Ph.D. awarded in 2005) – “Nanocrystalline germanium from oxidation of silicon-germanium films: synthesis, characterization and applications” [Eric Kan won the 3^rd prize in the Young Persons’ World Lecture Competition 2005 held in London, United Kingdom on his Ph.D. research topic] (C)

·                 Teo Lee Wee (SMA Ph.D. student – Ph.D. awarded in 2004) – “Germanium nanocrystal memory in silicon oxide matrix"

·                 Lim Peng Soon (Ph.D. awarded in 2001) – “Latent damage generation in silicon dioxide under high-field impulse and constant-bias stressing”

·                 Tao Jing Mei (Ph.D. awarded in 1998) – “A study of hot-carrier effects using photon emission spectroscopy”

·                 Wee Teng Soon (Ph.D. awarded in 1998) – “Laser processing of electronic materials”

·                 Leang Sern Ee (Ph.D. awarded in 1997) – “Hot carrier characterization of tungsten polycide gate and graded-junction MOS transistors” [SE Leang won the first prize in the postgraduate section of the IEEE Region 10 Student Paper Competition 1995.]

·                 Lou Choon Leong (Ph.D. awarded in 1997) – “New techniques for the characterization of hot-carrier degradation in MOS devices”

PUBLICATIONS & PATENTS

SELECTED PUBLICATIONS

1.    W.K. Chim, SE Leang and D.S.H. Chan, “Extraction of Metal-Oxide-Semiconductor Field-Effect-Transistor Interface State and Trapped Charge Spatial Distributions Using A Physics-Based Algorithm”,  J. Appl. Phys., vol. 81, no. 4, pp. 1992-2001, 1997.

2.   C.L. Lou, W.K. Chim, D.S.H. Chan and Y. Pan, “A Novel Single-Device DC Method for Extraction of the Effective Channel Mobility and Source-Drain Resistances of  Fresh and Hot-Carrier Degraded Drain-Engineered MOSFETs”, IEEE Trans. Electron Devices, vol. 45, no. 6, pp. 1317-1323, 1998.

3.    W.K. Choi, W.K. Chim, C.L. Heng, L.W. Teo, V. Ho, V. Ng , D.A. Antoniadis and E.A. Fitzgerald, “Observation of memory effect in germanium nanocrystals embedded in an amorphous silicon oxide matrix of a metal-insulator-semiconductor structure”, Appl. Phys. Lett., vol. 80, no. 11, pp. 2014-2016, 2002.

4.     L.W. Teo, W.K. Choi, W.K. Chim, V. Ho, C.H. Moey, M.S. Tay, C.L. Heng, Y. Lei, D.A. Antoniadis and E.A. Fitzgerald “Size control and charge storage mechanism of germanium nanocrystals in a metal-insulator-semiconductor structure", Appl. Phys. Lett.,  vol. 81, no. 19, pp.3639-3641, 2002.

5.     W.K. Chim, T.H. Ng, B.H. Koh, W.K. Choi, J.X. Zheng, C.H. Tung and A.Y. Du, “Interfacial and bulk properties of zirconium dioxide as a gate dielectric in metal-insulator-semiconductor structures and current transport mechanisms”, J. Appl. Phys., vol. 93, no. 8, pp.4788-4793, 2003.

6.     W.K. Chim, K.M. Wong, Y.T. Yeow, Y.D. Hong, Y. Lei, L.W. Teo and W.K. Choi,  “Monitoring oxide quality using the spread of the dC/dV peak in scanning capacitance microscopy measurements”, IEEE Electron Device Lett., vol. 24, no. 10, pp. 667-670, 2003.

7.    E.W.H. Kan, W.K. Choi, W.K. Chim, E.A. Fitzgerald and D.A. Antoniadis, “Origin of charge trapping in germanium nanocrystal embedded SiO₂ system: Role of interfacial traps?”, J. Appl. Phys., vol. 95, no. 6, pp.3148-3152, 2004.

8.     Y.N. Tan, W.K. Chim, B.J. Choi and W.K. Choi, “Over-erase phenomenon in SONOS-type Flash memory and its minimization using a hafnium oxide charge storage layer”, IEEE Trans. Electron Devices, vol. 51, no. 7, pp. 1143-1147, 2004.

9.     B.H. Koh, E.W.H. Kan, W.K. Chim, W.K. Choi, D.A. Antoniadis and E.A. Fitzgerald, "Traps in germanium nanocrystal memory and effect on charge retention: Modeling and experimental measurements”, J. Appl. Phys., vol. 97, no. 12, article no. 124305, pp.124305-1 to 124305-9, 2005.

10.    Y. Lei and W.K. Chim, “Highly ordered arrays of metal/semiconductor core-shell nanoparticles with tunable nanostructures and photoluminescence”, Journal of the American Chemical Society, vol. 127, no. 5, pp. 1487-1492, 2005.

11.     J.X. Zheng, G. Ceder, T. Maxisch, W.K. Chim and W.K. Choi, “Native point defects in yttria and relevance to its use as a high-dielectric-constant gate oxide material: a first-principles study”, Physical Review B, vol. 73, no. 1, article no. 104101, pp.104101-1 to 104101-7, 2006.

12.   Y.N. Tan, W.K. Chim, W.K. Choi, M.S. Joo and B.J. Cho, “Hafnium Aluminum Oxide as Charge Storage and Blocking Oxide Layers in SONOS-type Nonvolatile Memory for High Speed Operation”, IEEE Trans. Electron Devices, vol. 53, no. 4, pp. 654-662, 2006.

13.   J.X. Zheng, G. Ceder, T. Maxisch, W.K. Chim and W.K. Choi, “First-principles study of native point defects in hafnia and zirconia”, Physical Review B, vol. 75, no. 10, article no. 1041112, pp. 104112-1 to 104112-7, 2007.

14.   K.M. Wong, W.K. Chim, K.W. Ang and Y.C. Yeo, “Spatial distribution of interface trap density in strained channel transistors using the spread of the differential capacitance characteristics in scanning capacitance microscopy measurements”, Appl. Phys.  Lett., vol. 90, no. 15, article no. 153507, pp.153507-1 to 153507-3, 2007.

15.  K.M. Wong and W.K. Chim, “Deep-depletion physics-based analytical model for scanning capacitance microscopy carrier profile extraction”, Appl. Phys. Lett., vol. 91, no. 1, article no. 013510, pp.013510-1 to 013510-3, 2007.

16.   K.M. Wong, W.K. Chim, J.Q. Huang and L. Zhu, “Scanning capacitance microscopy detection of charge trapping in free-standing germanium nanodots and the passivation of hole trap sites”, J. Appl. Phys., vol. 103, no. 5, article no. 054505, pp.054505-1 to 054505-5, 2008.

17.   S.Y. Chiam, W.K. Chim, C. Pi, A.C.H. Huan, S.J. Wang, J.S. Pan, S. Turner and J. Zhang, “Band alignment of yttrium oxide on various relaxed and strained semiconductor substrates”, J. Appl. Phys., vol. 103, no. 8, article no. 083702, pp.083702-1 to 083702‑12, 2008.

18.   J.Q. Huang, W.K. Chim, S.J. Wang, S.Y. Chiam and L.M. Wong, “From germanium nanowires to germanium-silicon-oxide oxide nanotubes: Influence of germanium tetraiodide precursor”,  Nano Letters, vol. 9, no. 2, pp. 583-589, 2009 [Highlighted at the Nature Publishing Group Asia Materials website on 15 April 2009.]

19.  J.Q. Huang, S.Y. Chiam, W.K. Chim, L.M. Wong and S.J. Wang, “Heterostructures of germanium nanowires and germanium-silicon oxide nanotubes and growth mechanisms”,  Nanotechnology, vol. 20, no. 42, article no. 425604, pp. 425604-1 to 425604-8, 2009.

20.   C. Pi, Y. Ren and W. K. Chim, “Investigation of bipolar resistive switching and the time-dependent SET process in silver-sulfide/silver thin films and nanowire array structures”, Nanotechnology, vol. 21, no. 8, article no. 085709, pp. 085709-1 to 085709-8, 2010.

21.  J.Q. Huang, S.Y. Chiam, H.H. Tan, S.J. Wang and W.K. Chim, “Fabrication of silicon nanowires with precise diameter control using metal nanodot arrays as a hard mask blocking material in chemical etching”,  Chemistry of Materials, vol. 22, no. 13, pp. 4111-4116, 2010.

22. Y. Ren, W.K. Chim, S.Y. Chiam, J.Q. Huang, C. Pi and J.S. Pan, “Formation of nickel oxide nanotubes with uniform wall thickness by low-temperature thermal oxidation through understanding the limiting effect of vacancy diffusion and the Kirkendall phenomenon”, Advanced Functional Materials, vol. 20, no. 19, pp. 3336-3342, 2010.

23.   Y. Ren, S.Y. Chiam and W.K. Chim, “Diameter dependence of the void formation in the oxidation of nickel nanowires”,  Nanotechnology, vol. 22, no. 23, article no. 235606, pp. 235606-1 to 235606-6, 2011.

24.  Z.Q. Liu, W.K. Chim, S.Y. Chiam, J.S. Pan and C.M. Ng, “Ambiguity in the magnitude and direction of the derived interface dipole in lanthanum aluminate heterostructures: Implications and proposed solution”, J. Appl. Phys, vol. 109, no. 9, article no. 093701, pp. 093701-1 to 093701-8, 2011.

25.  Z.Q. Liu, W.K. Chim, S.Y. Chiam, J.S. Pan and C.M. Ng, “Evaluating the use of electronegativity in band alignment models through the experimental slope parameter obtained from band offsets of lanthanum aluminate heterostructures”, J. Appl. Phys., vol. 110, no. 9, article no. 093701, 2011.

26. C. Pi, Y. Ren, Z.Q. Liu and W.K. Chim, “Unipolar memristive switching in yttrium oxide and RESET current reduction using a yttrium interlayer”, Electrochemical and Solid-State Letters, vol. 15, no. 3, pp. G5-G7, 2012.

Book PUBLISHED

W.K. Chim, "Semiconductor Device and Failure Analysis Using Photon Emission Microscopy", Chichester: John Wiley & Sons Ltd., 269 pages, 2000. (ISBN 0-471-49240X)

 PATENTS 

[P1]     W.K. Chim, J.C.H. Phang and D.S.H. Chan, "Method and Apparatus for Measuring Quantitative Voltage Contrast", U.S. Patent No.: 5,486,769 (23 January 1996), Singapore Patent No.: 32423 (18 October 1996).

[P2]    J.C.H. Phang, W.K. Chim, D.S.H. Chan and Y.Y. Liu, "A Retractable Cathodoluminescence Detector with High Ellipticity and High Backscattered Electron Rejection Performance for Large Area Specimens", U.S. Patent No.: 5,569,920 (29 October 1996), Singapore Patent No.: 9500154-1 (6 September 1995).

[P3]     W.K. Chim, D.S.H. Chan, J.C.H. Phang, J.M. Tao and Y.Y. Liu, "Integrated Emission Microscope for Panchromatic Imaging, Continuous Wavelength Spectroscopy and Selective Area Spectroscopic Mapping", U.S. Patent No.: 5,724,131 (3 March 1998), Singapore Patent No.: 9500492-5 (22 May 1995).

[P4]      C.C. Hu, K.L. Pey, Y.F. Chong, W.K. Chim, P. Neuzil and C. Lap, "Incorporation of Dielectric Layer onto SThM Tips for Direct Thermal Analysis", U.S. Patent No.: 6,566,650 (20 May 2003).

[P5]      W.K. Choi, W,K. Chim, V. Ng and L. Chan, “Nanocrystal Flash Memory Device and Manufacturing Method Therefor”, Patent filed in U.S., Japan, Europe and Taiwan (Application No. 60/348,072 dated 19 October 2001). European patent granted on 13 Dec 2002 (Application/Patent No. 02256661.6), U.S. Patent No.: 6,656,792 (2 December 2003)

[P6]      W.K. Choi, W,K. Chim, V. Ng and L. Chan, “Nanocrystal Flash Memory Device and Manufacturing Method Therefor”, Patent filed in Japan (Application No. 290134/2002 dated 2 October 2002).

[P7]      W.K. Choi, W,K. Chim, V. Ng and L. Chan, “Nanocrystal Flash Memory Device and Manufacturing Method Therefor”, European patent granted on 13 Dec 2002 (Application/Patent No. 02256661.6).

[P8]      V. Ho, W.K. Choi, L. Chan, W.K. Chim, V. Ng, C.L. Heng and L.W. Teo, “Process to Manufacture Nonvolatile MOS Memory Device”, U.S. Patent 6,962,850 (8 November 2005).

[P9]     Y.N. Tan, W.K. Chim, B.J. Cho and W.K. Choi, “Memory Gate Stack Structure”, International Patent (Application No.: PCT/SG2004/000050) filed on 11 March 2004 (ETPL Ref: SRC/P//1760/PCT). International Publication Number WO 2005/088727 A1 published on 22 September 2005. U.S. Patent Application Number 10/592,632 filed on 11 Sep 2006 (Accorded Filing Date: 11 Mar 2004). Singapore Patent No.: 125517 [WO 2005/088727] (31 Oct 2008).

6 U.S., 1 European and 4 Singapore patents granted. 1 PCT Patent and 1 U.S. Patent and 1 Japanese Patent filed. Technologies in patents [P2] to [P3] have been licensed to industry and have led to commercial products.

Research

·        NUS Nanoscience and Nanotechnology Initiative (NUSNNI) Research Achievement Award 2004 (For research work on development of germanium nanocrystals-based memory device structure).

·        Best Paper Award in the area of Device Reliability at the 8^th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2001) held from July 9 to 13, 2001. The paper is entitled "Stress-Induced Leakage Current in Thin Oxides under High-Field Impulse Stressing" and is authored by Y.N. Tan, W.K. Chim and P.S. Lim.

·      Excellence and Outstanding Awards in the Visionspring $50K and $1K Business Plan Competition 2000 organised by Singapore Visionspring Pte. Ltd. and Singapore Technologies.

·        Outstanding University Researcher Award, 1997 (For the development of novel techniques and instrumentation for the analysis and reliability investigation of semiconductor devices and materials).

·       4th IES Innovators Award, 1996 (For the development of a new spectroscopic photon emission microscope system).

Teaching

• Faculty of Engineering Teaching Honours List 2008/2009

• Faculty of Engineering Teaching Commendation List 2007/2008, 2006/2007, 2005/2006, 2010/2011

• Faculty of Engineering Certificate of Teaching Commendation 2001/2002

·