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2005
Authors Title Conferences Venue/Year
G. H. Wang, E.-H. Toh, D. Weeks, T. Landin, J. Spear, C. H. Tung, S. G. Thomas, G. Samudra, and Y.-C. Yeo Strained Si n-FET featuring compliant SiGe Stress Transfer Layer (STL) and Si0.98C0.02 Source/Drain Stressors for Performance Enhancement International Semiconductor Device Research Symposium

College Park MD, USA, Dec. 12-14, 2007
A. E.-J. Lim, W.-W. Fang, F. Liu, R. T. P. Lee, G. S. Samudra, D.-L. Kwong, and Y.-C. Yeo Interface Dipole Mechanism and NMOS Ni-FUSI Gate Work Function Engineering using Rare-Earth Metal (RE)-Based Dielectric Interlayers

H.-S. Wong, K.-W. Ang, L. Chan, K.-M. Hoe, C.-H. Tung, N.Bala, D. Weeks, T. Landin, J. Spear, S. G. Thomas, G. Samudra, and Y.-C. Yeo

 Source/Drain-Extension-Last Process for Incorporating In Situ Doped Lattice-Mismatched Extension Stressor for Enhanced Performance in SOI N-FET
E.-H. Toh, G. H. Wang, C. Shen, M. Zhu, L. Chan, C.-H. Heng, G. Samudra, and Y.-C. Yeo Silicon Nano-Wire Impact Ionization Transistors with Multiple-Gates For Enhanced Gate Control and Performance
K.-W. Ang, H.-S. Wong, N. Balasubramanian, G. Samudra, and Y.-C. Yeo Enhanced Performance in Strained n-FET with Double-Recessed Si:C Source/Drain and Lattice-Mismatched SiGe Strain-Transfer Structure (STS)
Grace Huiqi Wang, Eng-Huat Toh, Xincai Wang, Debbie Hwee Leng Seng, S. Tripathy, T. Osipowicz, Tau Kuei Chan, Keat Mun Hoe, Chih Hang Tung, S. Balakumar, Guo-Qiang Lo, Ganesh Samudra, and Yee-Chia Yeo Silicon-Germanium-Tin (SiGeSn) Source and Drain Stressors formed by Sn Implant and Laser Annealing for Strained Silicon-Germanium Channel P-MOSFETs 2007 Int'l Electron Devices Meeting (IEDM)

Washington, USA, Dec. 2007
Eng-Huat Toh, Grace Huiqi Wang, Ming Zhu, Chen Shen, Lap Chan, Guo-Qiang Lo, Chih-Hung Tung, Dennis Sylvester, Chun-Huat Heng, Ganesh Samudra, and Yee-Chia Yeo

Impact Ionization Nanowire Transistor with Multiple-Gates, Silicon-Germanium
Impact Ionization Region, and Sub-5 mV/decade Subtheshold Swing
Kian-Ming Tan, Ming Zhu, Wei-Wei Fang, Mingchu Yang, Tsung-Yang Liow, Rinus T. P. Lee, Keat Mun Hoe, Chih-Hang Tung, N Balasubramanian, Ganesh S. Samudra, and Yee-Chia Yeo A New Liner Stressor with Very High Intrinsic Stress (> 6 GPa) and Low Permittivity Comprising Diamond-Like Carbon (DLC) for Strained P-Channel Transistors

Chen Shen, Jian-Qiang Lin, Eng-Huat Toh, K.-F. Chang, P. Bai, Chun-Huat Heng, Ganesh S. Samudra, Yee-Chia Yeo

On the performance limit of impact-ionization transistors

Rinus Tek-Po Lee, Alvin Tian-Yi Koh, Fang-Yue Liu, Wei-Wei Fang, Tsung-Yang Liow. Kian-Ming Tan, Poh-Chong Lim Andy Eu-Jin Lim, Ming Zhu, Wong, Hoong-Shing, Keat-Mun Hoe, Chih-Hang Tung, Guo-Qiang Lo, Xincai Wang, David Kuang-Yong Low, Ganesh S. Samudra, Dong-Zhi Chi and Yee-Chia Yeo

 Route to Low Parasitic Resistance in MuGFETs with Silicon-Carbon Source/Drain:Integration of Novel Low Barrier Ni(M)Si:C Metal Silicides and Pulsed Laser Annealing
J. Fu, K. D. Buddharaju, S. H. G. Teo, Chunxiang Zhu, M. B. Yu, N. Singh, G. Q. Lo,

Trap Layer Engineered Gate-All-Around Vertically Stacked Twin Si-Nanowire Nonvolatile Memory
 S. L. Tan, K. W. Ang, K. H. Toh, D. Isakov, C. M. Chua, L. S. Koh, Y.-C. Yeo, D. S. H. Chan, J. C. H. Phang Near-IR photon emission spectroscopy on strained and unstrained 60 nm silicon nMOSFETs 33rd International Symposium for Testing and Failure Analysis (TSTFA)

San Jose, CA, Nov. 2-8, 2007
 G.-C. Liang, N. Neophytos, M. Lundstrom, and D. Nikonov Simualtion study of the Double-Gate Graphene Nanoribbon MOSFETs 12th International Workshop on Computational Electronics

Amherst, USA, Oct. 2007
 E.-H. Toh, G. H. Wang, L. Chan, G. Samudra, and Y.-C. Yeo Device design and scalability of an impact-ionization MOS transistor with an elevated impact ionization region 2007 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

Vienna, Austria, Sep. 25-27, 2007
 Y. Jiang, N. Singh, D. S. H. Chan,T. Y. Liow, W. Y. Loh, S. BalakumarY. Sun, G. Q. Lo, D. L. Kwong Strained Ge-rich SiGe Nanowire pFETs with High-ｋ/Metal Gate Fabricated using Germanium Condensation Technique Int. Conference on Solid State Devices & Materials (SSDM)

Ibaraki, Japan, Sep. 18-21, 2007
 Rui Long Xie and Chun Xiang Zhu

Effects of Sulfur Passivation on Ge MOS Capacitors with High-k Gate Dielectric
 H. Zang, W. Y. Loh, J. D. Ye, T. H. Loh, G. Q. Lo, Byung Jin Cho

Integration of Dual Channels MOSFET on Defect-Free, Tensile-Strained Germanium on Silicon

 W.F. Yang, S.J. Lee, S.J. Whang, S.Y. Lim. B.J. Cho, D.L. Kwong

High quality Si1-XGeX nanowire and its application to MOSFET integrated with HfO2/TaN/Ta gate stack
 X. P. Wang, J. J. Yang, H. Y. Yu M. F. Li, J. D. Chen, R. L. Xie C. X. Zhu, A. Y. Du, P. C. Lim A. Lim, Y. Y. Mi, D. M. Y. Lai W. Y. Loh, S. Biesemans, G. Q. Lo D. L. Kwong Practical Solutions to Enhance EWF Tunability of Ni FUSI Gates on HfO2
 E.-H. Toh, G. H. Wang, G.-Q. Lo, L. Chan, G. Samudra, and Y.-C. Yeo Double-spacer impact-ionization MOS transistor: Characterization and analysis
 G. H. Wang, E.-H. Toh, C.-H. Tung, S. Tripathy, S. Balakumar, G.-Q. Lo, G. Samudra, and Y.-C. Yeo Silicon Strain-Transfer-Layer (STL) and graded source/drain stressors for enhancing the performance of silicon-germanium channel P-MOSFETs
 G. H. Wang, E.-H. Toh, X.-C. Wang, K.-M. Hoe, S. Tripathy, G.-Q. Lo, G. Samudra, and Y.-C. Yeo Pulsed laser irradiation of silicon-germanium-on-insulator (Si0.17Ge0.83OI) substrates for strain relaxation and defect reduction
 E.-H. Toh, G. H. Wang, L. Chan, D. Sylvester, C.-H. Heng, G. Samudra, and Y.-C. Yeo A double-gate tunneling field-effect transistor with silicon-germanium source for high-performance, low standby power, and low power technology applications
 C. Shen, E.-H. Toh, J. Lin, C.-H. Heng, D. Sylvester, G. Samudra, and Y.-C. Yeo A physics-based compact model for I-MOS transistors
 T.-Y. Liow, R. T. P. Lee, K.-M. Tan, M. Zhu, K.-M. Hoe, G. S. Samudra, N. Balasubramanian, and Y.-C. Yeo Strained N-channel FinFETs with high-stress nickel silicide-carbon contacts and integration with FUSI metal gate technology
 A. E.-J. Lim, R. T.P. Lee, A. T. Y. Koh, G. S. Samudra, D.-L. Kwong, and Y.-C. Yeo Effectiveness of aluminum incorporation in nickel silicide and nickel germanide metal gates for work function reduction
 K.-M. Tan, T.-Y. Liow, R. T. P. Lee, M. Zhu, K. M. Hoe, C.-H. Tung, N. Balasubramanian, G. S. Samudra, Y.-C. Yeo Novel extended-Pi shaped silicon-germanium (eΠ-SiGe) source/drain stressors for strain and performance enhancement in p-channel FinFETs
 R. T. P. Lee, K. M. Tan, A. E. J. Lim, T. Y. Liow, X. C. Chen, M. Zhu, A. T. Y. Koh, K. M. Hoe, S. Y. Chow, G. Q. Lo, G. S. Samudra, D. Z. Chi, Y.-C. Yeo Contact technology employing nickel-platinum germanosilicide alloys for p-channel FinFETs with silicon-germanium source and drain stressors
 H.-C. Chin, M. Zhu, G. S. Samudra, and Y.-C. Yeo N-channel MOSFETs with in-situ silane-passivated gallium arsenide channel and CMOS-compatible palladium-germanium contacts
 H.-S. Wong, L. Chan, G. Samudra, Y.-C. Yeo Schottky barrier height modulation for NiSi on n-Si (100) using Antimony (Sb) segregation

Andy Eu-Jin Lim, Rinus T. P. Lee, Xin Peng Wang, Wan Sik Hwang, Chih-Hang Tung,Doreen M. Y. Lai, Ganesh Samudra, Dim-Lee Kwong, and Yee-Chia Yeo

 Band Edge NMOS Work Function for Nickel Fully-Silicided (FUSI) Gate Obtained by the Insertion of Novel Y-, Tb-, and Yb-based Interlayers 37th European Solid-State Device Research Conference (ESSDERC)

Munich, Germany, Sep. 11-13, 2007 

Tsung-Yang Liow, Kian-Ming Tan, Rinus T. P. Lee, Ming Zhu1, Keat-Mun Hoe,Ganesh S. Samudra, N. Balasubramanian, and Yee-Chia Yeo

 Strain Enhancement in Spacerless N-Channel FinFETs with Silicon-Carbon Source and Drain Stressors

E.-H. Toh, G. H. Wang, L. Chan, G.-Q. Lo, D. Sylvester, C.-H. Heng, G. Samudra, and Y.-C. Yeo

 A complementary-I-MOS technology featuring SiGe channel and I-region for enhancement of impact-ionization, breakdown voltage, and performance 37th European Solid-State Device Research Conference (ESSDERC)

Munich, Germany, Sep. 11-13, 2007 

G. H. Wang, E.-H. Toh, Y.-L. Foo, S. Tripathy, S. Balakumar, G.-Q. Lo, G. Samudra, and Y.-C. Yeo

Uniaxial strained silicon n-FETs on silicon-germanium-on-insulator substrates with a embedded-Si0.7Ge0.3 stress transfer layer and source/drain stressors for performance enhancement
G.-C. Liang, N. Neophytos, M. Lundstrom and D. Nikonov Contact effects on Graphene Nanoribbon Field-Effect Transistors IEEE nano 2007
 

July, 2007 Hong Kong, China

 
K.M. Tan, T.Y. Liow, R.T.P. Lee, N. Balasubramanian, G.S. Samudra, and Y.-C. Yeo Plasma etching of gate electrode and gate-stringer for the fabrication of nanoscale multiple-gate transistors 4th International Conference on Materials for Advanced Technologies (ICMAT)

Singapore, Jul. 1-6, 2007
G.C. Liang Geometry effect of Si Nanowire MOSFETs  2007 Silicon Nanoelectronics Workshop

Kyoto, Japan, June 2007

 Wan Sik Hwang, Chen Shen, Xing Peng Wang, Daniel S. H. Chan, and Byung Jin Cho

 A Novel Hafnium Carbide (HfCx) Metal Gate Electrode for NMOS Device Application 2007 Symposium on VLSI Technology

Kyoto, Japan, June 2007

 K.-W. Ang, J. Lin, C.-H. Tung, N. Balasubramanian, G. Samudra, and Y.-C. Yeo

Beneath-The-Channel Strain-Transfer-Structure (STS) and Embedded Source/Drain Stressors for Strain and Performance Enhancement of Nanoscale MOSFETs 
 R. T. P. Lee, T.-Y. Liow, K.-M. Tan, A. E.-J. Lim, C.-S. Ho, K.-M. Hoe, T. Osipowicz, G.-Q. Lo, G.S. Samudra, D.-Z. Chi, and Y.-C. Yeo

Novel epitaxial nickel aluminide-silicide with low Schottky-barrier and series resistance for enhanced performance of dopant-segregated source/drain MuGFETs 
G.-C. Liang, N. Neophytos, D. Nikonov, and M. Lundstrom Theoretical study of Graphene Nanoribbon Field-Effect Transistors Nanotech 2007

Santa Clara, California, U.S.A 2007
E.-H. Toh, G. H. Wang, G.-Q. Lo, S.-F. Choy, L. Chan, G. Samudra, and Y.-C. Yeo A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancement VLSI-TSA

Taiwan, April, 2007 

K.-W. Ang, K.-J. Chui, C.-H. Tung, G. Samudra, N. Balasubramanian, and Y.-C. Yeo Enhanced carrier transport in strained bulk N-MOSFETs with silicon-carbon source/drain stressors
Y.-C. Yeo, K.-W. Ang, J. Lin, C.-S. Lam Strain-transfer structure beneath the transistor channel for increasing the strain effects of lattice-mismatched source and drain stressor MRS Spring

San Francisco, USA, April 2007
R. T.-P. Lee, K.-M. Tan, T.-Y. Liow, A. E. J. Lim, G. Q. Lo, G. S. Samudra, D. Z. Chi, and Y.-C. Yeo Sub-30 nm FinFETs with Schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for p-FinFETs

R.T.-P. Lee, K.-M. Tan, A. E.-J. Lim, T.-Y. Liow, G.-Q. Lo, G. Samudra, D. Z. Chi, and Y.-C. Yeo

 Material and electrical characterization of nickel silicide-carbon as contact metal to silicon-carbon source and drain stressors
G. H. Wang, E.-H. Toh, C.-H. Tung, Y.-L. Foo, S. Tripathy, S. Balakumar, G.-Q. Lo, G. Samudra, and Y.-C. Yeo Sub-50 nm strained n-FETs formed on silicon-germanium-on-insulator substrates and the integration of silicon source/drain stressors
G. H. Wang, E.-H. Toh, C.-H. Tung, Y.-L. Foo, S. Tripathy, S. Balakumar, G.-Q. Lo, G. Samudra, and Y.-C. Yeo Fabrication of strain relaxed silicon-germanium-on-insulator (Si0.35Ge0.65OI) wafers using cyclical thermal oxidation and annealing
Grace Huiqi Wang, Eng-Huat Toh, Keat Mun Hoe, S. Tripathy, S. Balakumar, Guo-Qiang Lo, Ganesh Samudra, and Yee-Chia Yeo Strained Silicon-Germanium-on-Insulator N-MOSFETs Featuring Lattice Mismatched Source/Drain Stressor and High-Stress Silicon Nitride Liner 2006 Int'l Electron Devices Meeting (IEDM)

San Francisco, USA, Dec. 2006
Y. Q. Wang, G. Samudra, D. Y. Gao, C. Shen, W. S. Hwang, G. Zhang, Y.-C. Yeo, and W. J. Yoo

Fast erasing and highly reliable MONOS type memory with HfO2 high-k trapping layer and Si3N4/SiO2 tunneling stack
C. Shen, M.-F. Li, C. E. Foo, T. Yang, D.M.Huang, T. C. Chua, F. Nouri, G. S. Samudra, Y.-C. Yeo Characterization and Physical origin of Fast Vth Transient in NBTI of pMOSFETs with SiON Gate Dielectric

Rinus T. P. Lee, Tsung-Yang Liow, Kian-Ming Tan, Andy Eu-Jin Lim, Hoong-Shing Wong, Poh-Chong Lim*, Doreen M.Y. Lai*, Guo-Qiang Lo**, Chih-Hang Tung**, Ganesh Samudra, Dong-Zhi Chi*, and Yee-Chia Yeo

Novel Nickel-Alloy Silicides for Source/Drain Contact Resistance Reduction in N-Channel Multiple-Gate Transistors with Sub-35nm Gate Length

Tsung-Yang Liow, Kian-Ming Tan, Hock-Chun Chin, Rinus T. P. Lee, Chih-Hang Tung, Ganesh S. Samudra, N. Balasubramanian, and Yee-Chia Yeo

Carrier Transport Characteristics of Sub-30 nm Strained N-Channel FinFETs Featuring Silicon-Carbon Source/Drain Regions and Methods for Further Performance Enhancement
Fei Gao, S.J. Lee, Rui Li, S.J. Whang, S. Balakumar, D.Z. Chi, Chia Ching Kean, S. Vicknesh, C.H. Tung, and D.-L. Kwong

GaAs p- and n-MOS Devices integrated with novel passivation (Plasma Nitridation and AlN-surface passivation) techniques and ALD-HfO2/TaN gate stack
Z. G. Zhu, Tony Low, M. F. Li, W. J. Fan, P. Bai, D. L. Kwong and G. Samudra Modeling Study of InSb Thin Film For Advanced III-V MOSFET Applications
W. S. Hwang, B. –J. Cho, D. S. H. Chan and W. J. Yoo Study on Nonvolatile Byproducts Generated during Etching of Advanced Gate Stacks 28th International Symposium on Dry Process

November 2006  Nagoya, Japan

W. S. Hwang, V. N. Bliznetsov, B. –J. Cho, D. S. H. Chan and W. J. Yoo Damage Free Etching of RuO2 in O2/He plasma
W. S. Hwang, W. J. Yoo, B. J. Cho, and D. S. H. Chan Effects of Low Energy Nitrogen Plasma on the Removal of HfSiON AVS 53rd International Symposium

November 2006 San Francisco, CA, USA
 X. P. Wang, M.-F. Li, H. Y. Yu, C. Ren, W. Y. Loh, C. X. Zhu, A. Chin, A. D. Trigg, Y.-C. Yeo, S. Biesemans, P. Lo, and D.-L. Kwong Work function tunability by incorporating lanthanum and aluminum into refractory metal nitride and a feasible integration process 8th International Conference on Solid-State and Integrated-Circuit Technology

Shanghai, China, Oct. 23 - 26, 2006
K.-J. Chui, K.-W. Ang, A. Madan, A. Du, C.-H. Tung, N.Balasubramanian, G. Samudra, and Y.-C. Yeo Ultra-thin-body P-MOSFET featuring silicon-germanium source/drain stressors with high germanium content formed by local condensation 36th European Solid-State Device Research Conference (ESSDERC)

Montreux, Switzerland, Sep. 18-22, 2006. 
 K.-W. Ang, H.-C. Chin, K.-J. Chui, M.-F. Li, G. Samudra, and Y.-C. Yeo Carrier backscattering characteristics of strained N-MOSFET featuring silicon-carbon source/drain regions
 A. E.-J. Lim, W.-S. Hwang, X.-P. Wang, D.-L. Kwong, and Y.-C. Yeo Work Function Modulation Using Thin Interdiffused Metal Layers for Dual Metal-Gate Technology Int. Conference on Solid State Devices & Materials (SSDM)

Yokohama, Japan, Sept. 12-15th 2006

 R.T.-P. Lee, K.-M. Tan, A. E.-J. Lim, T.-Y. Liow, G.-Q. Lo, G. Samudra, D. Z. Chi, and Y.-C. Yeo

 Sub-30 nm p-channel Schottky source/drain FinFETs: Integration of Pt3Si FUSI metal gate and high-k dielectric
 K.-M. Tan, T.-Y. Liow, R. T.-P. Lee, K.-J. Chui, C.-H. Tung, N. Balasubramanian, G. S. Samudra, W.-J. Yoo, and Y.-C. Yeo Sub-30 nm strained p-channel FinFETs with condensed SiGe source/drain stressors
 G. H. Wang, E.-H. Toh, K.-W. Ang, C.-H. Tung, A. Du, Y.-L. Foo, G.-Q. Lo, G. Samudra, and Y.-C. Yeo Strained SiGe-On-Insulator N-MOSFET with Silicon Source/Drain for Drive Current Enhancement
 H. Zhao, N. Agrawal, Y.-C. Yeo, R. Javier, S. C. Rustagi, G.S. Samudra Simulation of multiple gate FinFET device gate capacitance and performance with gate length and pitch scaling 2006 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

Monterey, CA, USA, Sep. 6-8, 2006

 N. Agrawal, J. Chen, Y.-C. Yeo, S. Lee, D. S. H. Chan, M.-F. Li, G. S. Samudra

 Interface barrier abruptness and work function requirements for Scaling Schottky source-drain MOS transistors
Tsung-Yang Liow, Kian-Ming Tan, Rinus T. P. Lee, Anyan Du, Chih-Hang Tung, Ganesh S. Samudra, Won-Jong Yoo,N. Bala and Yee-Chia Yeo Strained N-Channel FinFETs with 25 nm Gate Length and Silicon-Carbon Source/Drain Regions for Performance Enhancement  2006 Symposium on VLSI Technology

Honolulu, Hawaii, June 2006

Kah-Wee Ang, King-Jien Chui, Hock-Chun Chin, Yong-Lim Foo, Anyan Du, Wei Deng, Ming-Fu Li, Ganesh Samudra, N. Bala, and Yee-Chia Yeo

 50 nm Silicon-On-Insulator N-MOSFET Featuring Multiple Stressors: Silicon-Carbon Source/Drain Regions and Tensile Stress Silicon Nitride Liner 

X.P. Wang, C. Shen, Ming-Fu Li, H.Y. Yu, Yiyang  Sun, Y.P. Feng, Andy Lim, Hwang Wan Sik , Albert Chin, Y.C. Yeo, Patrick Lo , D.L.Kwong

Dual Metal Gates with Band-Edge Work Functions on Novel HfLaO High- κ Gate Dielectric

 

 
R. T. P. Lee, T.-Y. Liow, K.-M. Tan, K.-W. Ang, K.-J. Chui, G.-Q. Lo, D.-Z. Chi, and Y.-C. Yeo Process-Induced Strained P-MOSFET Featuring Nickel-Platinum Silicided Source/Drain Materials Research Society (MRS) Symposium

San Francisco, USA, Apr. 17-21st 2006

Y. P. Tan, Y. Song, Y. H. Teo Eric, S. L. Lim, Q.D. Ling, D.S.H. Chan, C.X. Zhu, E.T. Kang, Q. Lo Patrick

 A WORM-Type Memory Device with Rectifying Effect Based on a Conjugated Copolymer of PF6Eu on  Silicon substrate
Fei Gao, S. J. Lee, Rui Li, S. Balakumar, Chih-Hang Tung, Dim-Lee Kwong, and Dong-Zhi Chi

Schottky Source/Drain Transistor on Thin SiGe on Insulator Integrated with HfO2/TaN Gate Stack
S. K. Samanta, P. K. Singh, W. J. Yoo, G. Samudra, Y.-C. Yeo, L. K. Bera, and N. Balasubramanian Enhancement of memory window in short channel non-volatile memory devices using double layer tungsten nanocrystals 2005 Int'l Electron Devices Meeting (IEDM)

Washington, USA, Dec. 2005
Y. Q. Wang, P. K. Singh, W. J. Yoo, Y.-C. Yeo, G. Samudra, A. Chin, J. H. Chen, S. J. Wang, and D.-L. Kwong Long retention and low voltage operation using IrO2/HfAlO/HfSiO/HfAlO gate stack for memory application
E.-H. Toh, G. H. Wang, G.-Q. Lo, N. Balasubramanian, C.-H. Tung, F. Benistant, L. Chan, G. Samudra, and Y.-C. Yeo A novel CMOS-compatible L-shaped Impact Ionization MOS (LI-MOS) transistor
K.-W. Ang, K.-J. Chui, V. Bliznetsov, Y. Wang, L.-Y. Wong, C.-H. Tung, N. Balasubramanian, M. F. Li, G. Samudra, and Y.-C. Yeo Thin body silicon-on-insulator n-MOSFET with silicon-carbon source/drain regions for performance enhancement
K.-J. Chui, K.-W. Ang, A. Madan, G. H. Wang, C.-H. Tung, L.-Y. Wong, Y. Wang, S.-F. Choy, N. Balasubramanian, M. F. Li, G. Samudra, and Y.-C. Yeo Source/drain germanium condensation for p-channel strained ultra-thin body transistors
Nan Wu, Qingchun Zhang, Chunxiang Zhu, Chen Shen, D.S.H. Chan, M.F. Li, and N. Balasubramanian BTI and Charge Trapping in Germanium p- and n-MOSFETs with CVD HfO2 Gate Dielectric
Xiongfei Yu, Chunxiang Zhu, Mingbin Yu, M. F. Li, Albert Chin, C. H. Tung, D. Gui, and Dim-Lee Kwong Advanced MOSFETs Using HfTaON/SiO2 Gate Dielectric and TaN Metal Gate
with Excellent Performances for Low Standby Power Application
H.Y. Yu, J.D. Chen, M.F. Li, S.J. Lee, D.L. Kwong, M. van Dal, J.A. Kittl, A. Lauwers, E. Augendre, S. Kubicek, C. Zhao, H. Bender, B. Brijs, L. Geenen, P. Absil, M. Jurczak, and S. Biesemans Modulation of the Ni FUSI workfunction by Yb doping: from midgap to n-type band-edge
 
H. H. Ngu, W. S. Hwang, and W. J. Yoo Etching properties of High Work Function of IrO2 in Cl2/SF6 plasma for CMOS Application 27th International Symposium on Dry Process

November 2005  Jeju, Korea
W. S. Hwang, H. H. Ngu, G. Zhang, V. N. Bliznetsov, and W. J. Yoo Effect of SiO2 Mask on Surface Properties of Advanced Gate Stacks Using ICP of Cl2 / HBr
J. Chen, A. -Y. Du, W. J. Yoo, and D. S. H. Chan Formation of Ge Nanocrystals in Hf based High-K Dielectrics for Nonvolatile Flash Memory Device Application AVS 52nd International Symposium

October 2005 in Boston, MA, USA 
W. S. Hwang, Y. Q. Wang, W. J. Yoo, and V. Bliznetsov ICP Etching of p-type Conducting Materials with High Work Function for CMOS Application
W. S. Hwang and W. J. Yoo Effects of Non-Volatility of Etch Products on Surface Roughness during Etching of Advanced Gate Stack Materials
Zhang Qingchun, Wu Nan, Zhu Chunxiang, and L.K.Bera Germanium Out-Diffusion in HfO2 and its Impact on Electrical Properties Int. Conference on Solid State Devices & Materials (SSDM)

Kobe, Japan September 2005
Y. Song, Q.D. Ling, Chunxiang Zhu, E.T. Kang, D.S.H. Chan, W.H. Wang and D.L. Kwong Memory Effect of Device Based on a Conjugated Donor-Acceptor Copolymer
R.T.P. Lee, S.L. Liew, B. Balakrisnan, K.Y.Lee, Yee-Chia Yeo and D.Z. Chi Material and Electrical Characterization of Nickel Germanide for p-channel Germanium Schottky Source/Drain Transistors
W.S. Hwang . J.H. Chen, W.J. Yoo, and V. Bliznetsov Chemical Analysis of Etching Residues in Metal/ High-k Gate Stack for CMOS Applications 4th Asia-Pacific Chemical Reaction Engineering Symposium

Gyeongju, Korea, June 2005
Z. Tan, S.K. Samanta, W.J. Yoo and S. Lee Self-Assembly and Thermal Stability of Ni Nanocrystals Formed from the Agglomeration of Ni Thin Films on SiO2 and HfO2
Y.Q. Wang, J.H. Chen, W.J. Yoo, and Y.-C. Yeo Formation of Ge Nanocrystals on Hf Based High-k Materials
J.H. Chen, W.J. Yoo, and D.S.H. Chan Study on Chemical Etching Properties of Hafnium Oxide and Hafnium Nitride for Microelectronics Application
C.S. Park, B.J. Cho, W. S. Hwang, W. Y. Loh, L. J. Tang, and D.-L. Kwong Dual Metal Gate Process by Metal Substitution of Dopant-Free Polysilicon on High-K Dielectric 2005 Symposium on VLSI Technology Kyoto, Japan, June 2005
C. Ren, D. S. H. Chan, Fazhal B. B., H. M.-F. Li , Y.-C. Yeo, A. D. Trigg, A. Agarwal, N. Balasubramanian, J. S. Pan, P. C. Lim, and D.-L. Kwong Lanthanide-Incorporated Metal Nitrides with Tunable Work Function and Good Thermal Stability for NMOS Devices
T. Yang, M. F.Li, C. Shen, C. H. Ang, C. Zhu, Y. C.Yeo, G. Samudra, Subhash C. Rustagi, M. B. Yu, and D. L. Kwong Fast and Slow Dynamic NBTI components in p-MOSFET with SiON dielectric and their impact on device life-time and circuit application
S. J. Kim, B. J. Cho, M. B. Yu, M. F. Li, Y. Z. Xiong, C. Zhu, A. Chin, and D. -L. Kwong High Capacitance Density (> 17 fF/um2) Nb2O5-based MIM Capacitors for Future RF IC Applications
      2004
Kah Wee Ang, King Jien Chui, V. Bliznetsov, A. Y. Du, N. Balasubramanian, M.-F. Li, G. S. Samudra, and Y. -C. Yeo Enhanced Performance in 50-nm N-MOSFETs with Silicon-Carbon Source/Drain Regions
(Late News)		 2004 Int'l Electron Devices Meeting (IEDM) San Francisco, CA, Dec. 2004
C. Shen, M.F. Li, X.P. Wang, H.Y. Yu, Y.P. Feng, A.T.-L. Lim, Y.C. Yeo, D.S.H. Chan, and D.L. Kwong Negative U traps in HfO2 gate dielectrics and frequency dependence of dynamic BTI in MOSFETs
Tony Low, M.F. Li, W.J. Fan N.S. Tyam, Y.-C. Yeo, C. Zhu, A. Chin, L. Chan, and D.L. Kwong Impact of surface roughness on silicon & germanium ultra-thin-body MOSFETs
C.S. Park, B.J. Cho, L. J. Tang, and D.-L. Kwong Substituted aluminum metal gate on high-k dielectric for low work-function and Fermi-level pinning free
Y.N. Tan, W.K. Chim, W.K. Choi, M.S. Joo, T.H, Ng, and B.J. Cho High-k HfAlO charge trapping layer in SONOS-type nonvolatile memory device for high speed operation
S.J. Whang, S.J. Lee, F. Gao, N. Wu, C.X. Zhu, L.J. Tang, L.S. Pan, and D.L. Kwong
 		 Germanium p- & n-MOSFETs fabricated with novel surface passivation (plasma-PH3 and AlN) andHfO2/TaN gate stack
 
 W.S. Hwang, J.H. Chen, W.J. Yoo, D.S.H. Chan, and D.-L. Kwong Development of Post Etching Process for Hf Based High-k Gate Dielectric AVS 51st International Symposium Anahelm, CA, USA, Nov. 2004
 J.H. Chen, W.S. Hwang, W.J. Yoo, D.S.H. Chan, and D.-L. Kwong Study of Refractory Metal Nitrides/ HfO2 Gate Stack Etching Using Inductively Coupled Plasma
 J.H. Chen, W.S. Hwang, W.J. Yoo, and D.S.H. Chan Investigation of Etching Properties of HfSiO and HfSiON as Gate Dielectrics
M.S. Joo, B.J. Cho, D.Z. Chi, N. Balasubramanrian, and D.-L Kwong Behavior of Effective Work Function in Metal/High-K Gate Stack under High Temperature Process Int. Conference on Solid State Devices & Materials (SSDM) Tokyo, Japan, Sept. 2004
C.S. Park, B.J. Cho, L.J. Tang, W. Wang, D.-L. Kwong Top-Surface Aluminized and Nitrided Hafnium Oxide Using Synthesis of Thin AlN and HfO2 Stacked Layer
H.Y. Yu, Chi Ren, J.F. Kang, Yee-Chia Yeo , Daniel S.H. Chan , M.F.Li, D.-L. Kwong Thermal Stability of Metal Gate Work Functions
J.F. Kang, C. Ren, H.Y. Yu, X.P. Wang, M-F. Li, D.S.H. Chan, Y-C. Yeo, Y.Y. Wang, and D.-L. Kwong A Novel Dual-Metal Gate Integration Process for Sub-1nm EOT HfO2 CMOS Devices
Tony Low, C.Shen, M.F.Li, Y.C.Yeo, Y.T.Hou, C.X.Zhu, Albert Chin, Lap Can, D.L.Kwong Study of mobility in strained Si and Ge ultra-thin body MOSFETs
Kah-Wee Ang, Y.T. Hou, J. Singh, M.-F. Li, and Y.-C. Yeo Theoretical investigation of electrical performance and band structure of P-MOSFETs with Si1-xGex source/drain stressors
Y.T.Hou, Tony Low, B.Xu, M.F.Li, G.Samudra and D.L.Kwong Impact of metal work function on nano CMOS device performance 7th ICSICT (Int'l Conf Solid State and Integrated Circuits Technology Symposium) Beijing, Oct, 2004
S.Y.Zhu, Jingde Chen, H.Y.Yu, S.J.Whang, J.H.Chen, C.Shen, M.F.Li, S.J.Lee, C.X.Zhu, A.Du, Jagar Singh, Albert Chin, D.L.Kwong Schottky s/d MOSFETs with high-k gate dielectrics and metal gate electrodes
S.-J. Ding, H. Hu, C. Zhu, S.J. Kim, X.F. Yu, M.-F. Li, B.J. Cho, A. Chin, and D.-L. Kwong A comparison study of high density MIM capacitors with ALD HfO2-Al2O3 laminated, sandwiched and stacked dielectrics
Nan Wu, Qingchun Zhang, Chunxiang Zhu, DSH Chan, MF Li, N. Balasubramanrian, AY Du, A. Chin, Johnny KO Sin, and D.-L. Kwong A Novel Surface Passivation Process for HfO2 Ge MOSFETs Device Research Conference (DRC) June 21-23, 2004 at Indiana, USA
S. J. Kim, B. J. Cho, M. F. Li, S. J. Ding, M. B. Yu, C. Zhu, A. Chin, and D. -L. Kwong Engineering of Voltage Nonlinearity in High-K MIM Capacitor for Analog/Mixed-Signal ICs
 (Best Student Paper)		 2004 Symposium on VLSI Technology Honolulu, Hawaii, June 2004
Xiongfei Yu, C. Zhu, X.P. Wang, M.F. Li, A. Chin, A.Y. Du, W.D. Wang and D.-L. Kwong High Mobility and Excellent Electrical Stability of MOSFETs Using a Novel HfTaO Gate Dielectric
Yee-Chia Yeo, Jisong Sun, and Eng Hong Ong Strained channel transistor using strain field induced by source and drain stressors Materials Research Society (MRS) Symposium vol. 809, pp. B10.4.1-6, San Francisco, CA, Apr. 2004
C. Shen, H.Y. Yu, X.P. Wang, M.F. Li, Y.C. Yeo, DSH Chan, K.L. Bera, D.L. Kwong Frequency Dependent Dynamic Charge Trapping in HfO2 and Threshold Voltage Instability in MOSFETs Intl Reliability Physics Symposium (IRPS) USA, Apr 2004
K.Y. Yiang, T. S. Mok, W.J. Yoo, and A. Krishnamoorthy Reliability Improvement Using Buried Capping Layer in Advanced Interconnects
V.C. Ngwan, C. Zhu, and A. Krishnamoorthy Analysis of leakage mechanisms and leakage pathways in intra-level Cu interconnects
      2003
W.Y. Loh, B. J. Cho, M. S. Joo, M. F. Li, DSH Chan, D. L. Kwong Analysis of charge trapping and breakdown mechanism in high-K dielectrics with metal gate electrode using carrier separation 2003 Int'l Electron Devices Meeting (IEDM) Washington DC, USA, Dec. 2003
H.Y. Yu, J.F. Kang, J.D. Chen, C. Ren, Y.T. Hou, S.J. Whang, M.-F. Li, D.S.H. Chan, K.L. Bera, C.H. Tung,  A. Du, D.-L. Kwong Thermally Robust High Quality HfN/HfO2 Gate Stack for Advanced CMOS Devices
T. Low, Y. T. Hou, M. F. Li, C. Zhu, A. Chin, G. Samudra1 and D. -L. Kwong Investigation of Performance Limits of Germanium Double-Gated MOSFETs
H. Hu, S. J. Ding, H. F. Lim, C. Zhu, M.F. Li, S.J. Kim, X. F. Yu, J. H. Chen, Y. F. Yong, B. J. Cho, D.S.H. Chan, S. C. Rustagi, M. B. Yu, C. H. Tung, A. Du, D. My, P. D. Fu, A. Chin, and D. L. Kwong High Performance HfO2-Al2O3 Laminate MIM Capacitors by ALD for RF and Mixed Signal IC Applications
C. Zhu, H. Hu, X. Yu, S. J. Kim, A. Chin, M. F. Li, B. J. Cho and D. L. Kwong Dependences of VCC (Voltage Coefficient of Capacitance) of High-K HfO2 MIM Capacitors: An Unified Understanding and Prediction
H. Huang, D. S. Yu, A. Chin, W. J. Chen, C. X. Zhu, M.-F. Li, B. J. Cho, and D. L. Kwong Fully Silicided NiSi and Germanided NiGe Dual Gates on SiO2/Si and Al2O3/Ge-On-Insulator MOSFETs
A. Chin, K. T. Chan, H. C. Huang, C. Chen, V. Liang, J. K. Chen, S. C. Chien, S. W. Sun, D. S. Duh, W. J. Lin, C. Zhu, M.-F. Li, S. P. McAlister and D. L. Kwong RF Passive Devices on Si with Excellent Performance Close to Ideal Devices Designed by Electro-Magnetic Simulation
Y.T. Hou, M.F. Li, T. Low and D.L. Kwong Impact of Metal Gate Work Function on Gate Leakage of MOSFETs Int'l Semiconductor Device Research Symposium (ISDRS) Washington DC, USA, 10-12 Dec 2003
Zhu Shiyan, H.Y. Yu, S.J. Whang, J.H. Chen, Chen Shen, C. Zhu, S.J. Lee, M.F. Li, D.S.H. Chan, W.J. Yoo, A. Du, C.H. Tung, J. Singh, A. Chin, and D.-L. Kwong Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectrics and metal gate electrode
Rohit Gupta, W.J. Yoo, D.S.H. Chan Comparative study of Si/SiGe nano crystal growth embedded in SiO2, HfO2, and Si3N4 as floating gate for flash memory devices Int'l Conf on Materials of Advanced Technologies 10-12 Dec 2003
Jinghao Chen, Won Jong Yoo, and Daniel SH Chan Investigation of Etching Properties of HfO2 gate dielectrics
C. H. Huang, M.Y. Yang, A. Chin, C. X. Zhu, M. F. Li, and D. L. Kwong High Density RF MIM Capacitors Using High-K  AlTaOx Dielectrics IEEE MTT-S International Microwave Symposium vol. 1, pp. 507-510, June 8-13, 2003
52) K. T. Chan, A. Chin, J. T. Kuo, C. Y. Chang, D. S. Duh, W. J. Lin, C. X. Zhu, M. F. Li, and D. L. Kwong Microwave Coplanar Filters on Si Substrates vol. 3, pp. 1909-1912, June 8-13, 2003
C. Y. Lin, L. H. Lai, A. Chin, Y. T. Hou, M. F. Li, and S. P. McAlister Light emission from Al2O3/Si1-xGex/Si MOS tunnel diodes Device Research Conference (DRC) Salt Lake City, Utah, June 2003
M. S. Joo, B. J. Cho, C. C. Yeo, Y. L. Ching, W. Y. Loh, S. J. Whoang, S. Mathew, L. K. Bera, N. Bala, and D. L. Kwong Physical and electrical properties of MOCVD HfAlxOy gate dielectric and their composition ratio dependence

2nd International Conference on Materials for Advanced Technologies (ICMAT)

 Singapore, 2003
C. C. Yeo, M. S. Joo, B. J. Cho, S. J. Whang, D. L. Kwong, L. K. Bera, S. Mathew, N. Balasubramanian MOCVD HfO2 gate dielectric deposited by liquid delivery system and bubbler system using multi-step deposition technique
D. C. H. Poon, B. J. Cho, L. S. Tan, M. Bhat, and L. Chan Electrical evaluation of laser annealed junctions by Hall measurement
C. S. Park, B. J. Cho, N. Balasubramanian, and D. L. Kwong Feasibility study of using thin aluminum nitride film as a buffer layer for dual metal gate process
H. Y. Yu, N. Wu, C. Yeo, M. S. Joo, M. F. Li, C. Zhu, B. J. Cho, D. L. Kwong ALD (HfO2)x(Al2O3)1-x high-K gate dielectrics for advanced MOS devices application
S. J. Kim, H. F. Lim, H. Hu, X. F. Yu, H. Y. Yu, B. J. Cho, M. F. Li, C. X. Zhu, A. Chin, and D. L. Kwong Properties of PVD Hafnium oxide films in metal-insulator-metal structure and the role of HfN barrier at dielectric/metal interface
S. Mathew, L. K. Bera, N. Balasubramanian, M. S. Joo, and B. J. Cho Channel mobility behaviour in high-K/metal gate NMOSFETs
M. Balasubramanian, L. K. Bera, S. Mathew, V. Lim, M. S. Joo, and B. J. Cho Wet etching characteristics and surface morphology evaluation of MOCVD grown HfO2 film
Q. C. Zhang, C. Zu, N. Wu, A. Chin, M. F. Li, B. J. Cho, L. K. Bera, and D. L. Kwong Germanium MOS capacitors with ultra thin HfO2 gate dielectric
C. Ren, J.F. Kang, et al Electrical properties and carrier transport mechanisms of high-K gate dielectrics
R. Gupta, L.K. Bera, W.J. Yoo, D.S.H. Chan, and N. Balasubramanian Investigation of Nucleation and Growth of Si(Ge) Nanocrystals Embedded in HfO2 as Floating Gate for Flash Memory Devices

50th AVS (the American Vacuum Society) Symposium

 Baltimore, Nov, 2003
K.M.Tan, W.J. Yoo, and L. Chan Investigation of Trim Etching Process for Formation of Si/High-K Gate Stack
J. Chen, W.J. Yoo, and D.S.H. Chan Investigation of Etching Properties of Hafnium Oxide Based High-K Materials Using Inductively Coupled Plasma
M. S. Joo, B. J. Cho, C. C. Yeo, S. J. Whoang, S. Matthew , L. K. Bera, N. Balasubramanian, D.-L. Kwong MOCVD HfAlxOy Gate Dielectrics Deposited Using Single Cocktail Liquid Source Int. Conference on Solid State Devices & Materials (SSDM) Tokyo, Japan, Sept, 2003
C. C. Yeo, B. J. Cho, M. S. Joo, S. J. Whoang, D. L. Kwong, L. K. Bera, S. Mathew, and N. Balasubramanian Improving Electrical Properties of CVD HfO2 by Multi-Step Deposition and Annealing in a Gate Cluster Tool
C. S. Park, B. J. Cho, N. Balasubramanian, and D. -L. Kwong A novel approach for integration of dual metal gate process using ultra thin aluminum nitride buffer layer Symposium on VLSI Technology (SOVT) Kyoto, Japan, June 2003
H. Y. Yu, H. F. Lim, J. H. Chen, M. F. Li, C. Zhu, D. -L. Kwong, C. H. Tung, K. L. Bera, and C. Leo Robust HfN Metal Gate Electrode for Advanced MOS Devices Application
S. J. Kim, B. J. Cho, M. F. Li, C. Zhu, A. Chin, and D. -L. Kwong HfO2 and Lanthanide-doped HfO2 MIM capacitors for RF/Mixed IC applications
Tony Low, Y. T. Hou, M. F. Li, C Zhu , D. -L. Kwong , and A. Chin Germanium MOS: An Evaluation from Carrier Quantization and Tunneling Current
G.Chen, K.Y.Chuah, M.F.Li, DSH Chan, C.H.Ang, J.Z.Zheng, Y. Jin and D.L.Kwong Dynamic NBTI of pMOS transistors and its impact on MOSFET lifetime IEEE Int. Reliability Physics Symposium (IRPS) Dallas , TX , 2003
D. Chong, W. J. Yoo and C. M. Lek Plasma Charging Damage Immunities of Rapid Thermal Nitrided Oxide And Decoupled Plasma Nitrided Oxide Int. Symp. on the Physical & Failure Analysis of Integrated Circuits (IPFA) Singapore, July 2003
W. Y. Loh, B. J. Cho, M. F. Li, Daniel S. H. Chan, C. H. Ang, Z. J. Zhen, and D. L. Kwong Progressive breakdown statistics in ultra-thin silicon dioxides
S. S. Tan, C. H. Ang, C. M. Lek, T. Chen, B. J. Cho, A. See and L. Chan Characterization of Ultrathin Plasma Nitrided Gate Dielectrics in PMOSFET for 0.18µm Technology and Beyond
D. Poon, B. J. Cho, Y. F. Lu, M. Bhat, and A. See A comparative study of multiple and single pulse laser annealing for ultrashallow boron junction formation Ultra-Shallow  Junctions-2003 Workshop April 27 - May 1, 2003, Santa Cruz, California, USA.
H. Hu, C. Zhu, Y. F. Lu, J. N. Zeng, Y. H. Wu, T. Liew, M. F. Li, and W. K. Choi Material and Electrical Characterization of HfO2 Films for MIM Capacitors Application MRS Spring Meeting CA, USA, May 2003
X. Yu, C. Zhu, H. Hu, A. Chin, M. F. Li, B. J. Cho, D. L. Kwong, P. D. Foo, and M. B. Yu MIM capacitors with HfO2 and HfAlOx for Si RF and analog applications
D. Poon, B. J. Cho, Y. F. Lu, M. Bhat, and A. See Process optimization for multiple-pulse laser annealing of boron implanted silicon with germanium pre-amorphization
C. S. Fong, V. L. S. Wei, R. G. Krishnam, A. Trigg, L. K. Bera, S. Mathew, N. Balasubramanian, M. S. Joo, C. C. Yeo, and B. J. Cho Growth and characterization of hafnium oxide thin films prepared by MOCVD 2003 International conference on Characterisation and Metrology for ULSI technology Austin, USA, March 2003
     

2002
Y.T. Hou, M.F. Li, D.L. Kwong Quantum Tunneling and Scalability of HfO2 and HfAlO Gate Stacks 2002 Int'l Electron Devices Meeting  (IEDM) San Francisco, CA, 2002
H. Y. Yu, M. F. Li, D. L. Kwong, B. J. Cho, J. S. Pan, C. H. Ang, and J. Z. Zheng Investigation of (HfO2)x(Al2O3)1-x on (100) Si by XPS - energy gap and band alignment Int. Conference on Solid State Devices & Materials (SSDM) Nagoya, Japan, Aug. 2002
K. M. Tan. W. J. Yoo, W. K. Choi, Y. H. Wu, J. H. Chen and Daniel S. H. Chan ICP etching of poly-srystalline Si-Ge as a gate materials 49th AVS (the American Vacuum Society) Symposium Denver, Co, U. S, Nov, 2002
Y. Jin, W.Y. Teo, Y.T. Hou, F.H. Gn, H.F. Lim, Z.Y. Han, and M.F.Li Enhanced  Plasma Charging Damage due to AC Charging Effect International Reliability Physics Symposium (IRPS) 2002
W. Y. Teo, Y. T. Hou, M. F. Li, P. Chen, L. H. Ko, X. Zeng, Y. Jin, F. H. Gn and L. H. Chan on Dual Gate Oxide Charging Damage in 0.13mm Copper Damascene Technology 7th international Symposium on Plasma-  and Process-Induced Damage (P2ID) Maui, Hawaii, USA pp.14-17, 2002
G. Chen , B. B. Jie and M. F. Li Investigation of interface traps located at different regions in p-MOS transistors using DCIV technique ICSICT 2002  
Daniel Chong, Won Jong Yoo, Lap Chan, and Alex See Effect Of Polysilicon Anneal On Gate Oxide Charging Damage In Polysilicon Gate Patterning Process MRS Meeting 2002
Daniel Chong, Won Jong Yoo and Chun Meng Lek Plasma Charging Damage Immunities of Rapid Thermal Nitrided Oxide And Decoupled Plasma Nitrided Oxide Int. Symp. on the Physical and Failure Analysis of Integrated Circuits (IPFA) Singapore, July 2002
C. M. Lek , B. J. Cho, W. Y. Loh, C. H. Ang, W. Lin, Y. L. Tan, J. Z. Zhen, J. Tan, T. P. Chen Effects of Post-Decoupled-Plasma-Nitridation Annealing of Ultra-Thin Gate Oxide
W. Y. Loh, B. J. Cho, M. F. Li, C. M. Lek, Y. F. Yong and M. S. Joo Correlation between interface traps and gate laeakage in ultra-thin silicon dioxide (20A)
H. Xie, W. J. Yoo, C. Zhu, S. Y. Lim, D. Tan, B. J. Cho, and D. Lai Electrical Properties of CMOS Devices with Cu Local Interconnects Int.Conference on Dielectrics & Conductors for ULSI Multilevel Interconnection (DCMIC) USA, February 2002
     

2001
Y. T. Hou, M. F. Li, W. H. Lai and Y. Jin A physical model for hole direct tunneling currents through ultrathin gate dielectrics in advanced CMOS devices SSDM 2001 p.144, Tokyo, Japan 
G. Chen, M. F. Li and X.Yu Monitoring degradation of source/drain extension in sub-quarter-micron MOSFET's p. 138, Tokyo, Japan 
Y. T. Hou, M. F. Li and Y. Jin Hole quantization and hole direct tunneling in deep submicron p-MOSFETs ICSICT 2001 Shanghai, China , vol. 2, p. 893. (invited)
G. Chen , B. B. Jie and M. F. Li Investigation of interface traps located at different regions in p-MOS transistors using DCIV technique Shanghai, China , vol. 2, p. 1047
C. Zhu, W. J. Yoo, D. P. P. Tan, S. Y. Lim, and B. J. Cho Effects of Cu diffusion on MOSFET electrical properties Int. VLSI Multilevel Interconnection Conf. (VMIC) Santa Clara, November 2001
D. Chong, W. J. Yoo, T. C. Ang, S. Y. Loong, R. Cha, P. H. Lee, N. Layadi, L. Chan, and A. See In-line Plasma Induced Charging Monitor For 0.15um Polysilicon Gate Etching Int. Symp. on the Physical and Failure Analysis of Integrated Circuits (IPFA) Singapore, July 2001
W. Y. Loh, B. J. Cho, M. F. Li, and Z. Xu Bipolar current stressing and electrical recovery of quasi-breakdown in thin gate oxides
   

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